Senior RTL Design Engineer
WHAT YOU DO AT AMD CHANGES EVERYTHING
At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.
THE ROLE:
This role will focus on planning, micro architect, documenting, code and debug the RTL for new and existing features for AMD’s Infinity Data Fabric with focus on complexity, timing, area and power consumption efficiency.
THE PERSON:
You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites and time zones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.
KEY RESPONSIBILITIES:
Collaborate with architects, hardware engineers, and firmware engineers to understand the new features to be designed
Micro architect the feature, document it, estimate the effort and review the implementation with RTL lead and verification team
Execute the RTL code of the new feature at best quality and within the estimated duration
Debug and fix the RTL bugs, fix timing, area and power consumption issues
Debug support for SOC simulation, emulation and actual silicon bring-up in lab
Analyze code coverage and detect holes in the verification environment
PREFERRED EXPERIENCE:
Experience with digital circuits and the ability to synthesize small circuitry
Experience with Verilog Hardware description Language is highly desirable
Good understanding of how a microprocessor/microcontroller works and how such devices can be interfaced with various peripherals like memories and io devices
Good understanding on cache coherency protocols is desirable
Proficient in debugging firmware and RTL code using simulation tools
Exposure to leadership or mentorship is an asset
Excellent communication skills & teamwork experience is highly desirable.
Experience with scripting languages like TCL, Perl, Python is a plus
Exposure to basic Linux commands - awk, sed, vim & regular expression is a plus
Exposure to EDA tools, like the ones from Synopsys, Cadence, Mentor Graphics, Xilinx is a plus
ACADEMIC CREDENTIALS:
Bachelors or Masters degree in computer engineering/Electrical Engineering
LOCATION: Iasi (Hybrid), Brasov or Bucharest, Romania (Remote)
#LI-NG2
#LI-REMOTE
#Iasi
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.
At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.
THE ROLE:
This role will focus on planning, micro architect, documenting, code and debug the RTL for new and existing features for AMD’s Infinity Data Fabric with focus on complexity, timing, area and power consumption efficiency.
THE PERSON:
You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites and time zones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.
KEY RESPONSIBILITIES:
Collaborate with architects, hardware engineers, and firmware engineers to understand the new features to be designed
Micro architect the feature, document it, estimate the effort and review the implementation with RTL lead and verification team
Execute the RTL code of the new feature at best quality and within the estimated duration
Debug and fix the RTL bugs, fix timing, area and power consumption issues
Debug support for SOC simulation, emulation and actual silicon bring-up in lab
Analyze code coverage and detect holes in the verification environment
PREFERRED EXPERIENCE:
Experience with digital circuits and the ability to synthesize small circuitry
Experience with Verilog Hardware description Language is highly desirable
Good understanding of how a microprocessor/microcontroller works and how such devices can be interfaced with various peripherals like memories and io devices
Good understanding on cache coherency protocols is desirable
Proficient in debugging firmware and RTL code using simulation tools
Exposure to leadership or mentorship is an asset
Excellent communication skills & teamwork experience is highly desirable.
Experience with scripting languages like TCL, Perl, Python is a plus
Exposure to basic Linux commands - awk, sed, vim & regular expression is a plus
Exposure to EDA tools, like the ones from Synopsys, Cadence, Mentor Graphics, Xilinx is a plus
ACADEMIC CREDENTIALS:
Bachelors or Masters degree in computer engineering/Electrical Engineering
LOCATION: Iasi (Hybrid), Brasov or Bucharest, Romania (Remote)
#LI-NG2
#LI-REMOTE
#Iasi
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.